Loyola College B.Sc. Physics Nov 2012 Electronics – I Question Paper PDF Download

LOYOLA COLLEGE (AUTONOMOUS), CHENNAI – 600 034

B.Sc., DEGREE EXAMINATION – PHYSICS

THIRD SEMESTER – NOVEMBER 2012

 PH 3504/3502/5501- ELCTRONICS – I

 

 

 

Date : 02-11-2012              Dept. No.                                        Max. : 100 Marks

Time : 9.00 – 12.00

 

PART – A

Answer All Questions:                                                                                              (10 X 2 = 20 MARKS)

 

  1. State Norton’s Theorem.
  2. What is the characteristic feature of a linear network?
  3. Define bandwidth of an amplifier.

 

  1. Mention the different techniques adopted for coupling of amplifier stages.
  2. Define CMRR and express it in decibels.
  3. State two applications of UJT.
  4. What is a demultiplexer?

 

  1. Draw the logic symbol and write the truth table of a D flip-flop.

 

  1. State any two significant differences between ROM and RAM.

 

  1. How many flip-flops are required to construct a MOD-128 counter and what is the largest decimal number that can be stored in a MOD-64 counter?

 

PART – B

 

Answer ANY FOUR Questions:                                                                  (4 x 7.5 = 30 marks)

 

  1. State superposition theorem and use it to find the current through R1 in the following circuit were V2=10V; V1=5V; R1=1Ω; R2= 3Ω; R3=2Ω.                                                              (1.5+6)
  2. With a neat diagram explain in detail the working of a Monostable Multivibrator.                   (7.5)

 

  1. Explain the working of a summing amplifier. How can it be wired to provide an output voltage that is equal to the difference of two input voltages?                                                              (5+2.5)

 

  1. Simplify into sum of products F (A, B, C, D) = Σ (1, 3, 4, 5, 6, 7, 9, 12, 13) using K-map and draw the logic circuit for the simplified expression.                                                 (6+1.5)

 

  1. Explain with the logic diagram how data can be shifted serially into and received in a parallel manner in an 8-bit shift register.                                     (7.5)

 

PART C

 

Answer ANY FOUR questions :                                                                              (4 x 12.5 = 50 marks)

 

  1. Obtain expressions for Ai, Av and Zi interms of ‘h’ parameters for a transistor amplifier connected in common emitter configuration with necessary equivalent circuit.              (9+3.5)

 

  1. (a) Explain with a neat circuit the functioning of a phase shift oscillator.

(b) If the values of resistances R1, R2 & R3 is 1MΩ and capacitors C1, C2 and C3 is

68pF, at what frequency will the circuit oscillate.                                                            (10+2.5)

 

  1. Describe the working of an n-channel FET with a properly biased circuit. Plot and explain the drain and transfer characteristics for the same.                                              (6.5+3+3)

 

  1. (a) Design using logic gates a 16 to 1 multiplexer and explain its functioning.

(b) Explain the working of a JK master slave flip flop with the logic diagram and truth

table.                                                                                                                                    (6+6.5)

 

  1. With a neat circuit explain the working of a MOD-5 counter. How can it be modified to function as a decade counter?                                                 (6+6.5)

 

 

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